[m-rev.] diff: Mercury ARM port
Julien Fischer
juliensf at cs.mu.OZ.AU
Fri Dec 2 17:43:47 AEDT 2005
Estimated hours taken: 0.5 by me (+ unknown by Sergey Khorev)
Branches: main, release
Commit Sergey Khorev's patch to port Mercury to the ARM architecture.
configure.in:
runtime/mercury_regs.h:
runtime/machdeps/arm_regs.h:
Global registers for ARM.
runtime/Mmakefile:
Add arm_regs.h to the list of machine dependent headers.
runtime/machdeps/ARM_REGS:
Add documentation from the gcc source code on what registers
can be used.
runtime/machdeps/arm_regtest:
Test what registers we can use on ARM.
Julien.
Index: configure.in
===================================================================
RCS file: /home/mercury1/repository/mercury/configure.in,v
retrieving revision 1.441
diff -u -r1.441 configure.in
--- configure.in 29 Nov 2005 04:02:48 -0000 1.441
+++ configure.in 2 Dec 2005 05:33:17 -0000
@@ -3136,6 +3136,13 @@
NUM_REAL_R_TEMPS=6
HAVE_DELAY_SLOT=
;;
+ arm*-*)
+ # NUM_REAL_REGS=4
+ # but succip and sp are real regs, so subtract 2
+ NUM_REAL_R_REGS=2
+ NUM_REAL_R_TEMPS=0
+ HAVE_DELAY_SLOT=
+ ;;
*)
NUM_REAL_R_REGS=0
NUM_REAL_R_TEMPS=6
Index: runtime/Mmakefile
===================================================================
RCS file: /home/mercury1/repository/mercury/runtime/Mmakefile,v
retrieving revision 1.129
diff -u -r1.129 Mmakefile
--- runtime/Mmakefile 3 Nov 2005 01:44:13 -0000 1.129
+++ runtime/Mmakefile 2 Dec 2005 05:34:20 -0000
@@ -131,6 +131,7 @@
machdeps/mips_regs.h \
machdeps/pa_regs.h \
machdeps/rs6000_regs.h \
+ machdeps/arm_regs.h \
machdeps/sparc_regs.h \
machdeps/x86_64_regs.h
Index: runtime/mercury_regs.h
===================================================================
RCS file: /home/mercury1/repository/mercury/runtime/mercury_regs.h,v
retrieving revision 1.25
diff -u -r1.25 mercury_regs.h
--- runtime/mercury_regs.h 30 Aug 2005 03:13:53 -0000 1.25
+++ runtime/mercury_regs.h 1 Dec 2005 07:21:29 -0000
@@ -94,6 +94,8 @@
#include "machdeps/rs6000_regs.h"
#elif defined(__ia64__)
#include "machdeps/ia64_regs.h"
+ #elif defined(__arm__)
+ #include "machdeps/arm_regs.h"
#else
#error "MR_USE_GCC_GLOBAL_REGISTERS not yet supported on this machine."
#endif
Index: runtime/machdeps/ARM_REGS
===================================================================
RCS file: runtime/machdeps/ARM_REGS
diff -N runtime/machdeps/ARM_REGS
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ runtime/machdeps/ARM_REGS 2 Dec 2005 05:36:04 -0000
@@ -0,0 +1,116 @@
+This file contains the relevant part of config/arm/arm.h from the
+GNU C source code which describes how each register is used.
+
+/* Register allocation in ARM Procedure Call Standard (as used on RISCiX):
+ (S - saved over call).
+
+ r0 * argument word/integer result
+ r1-r3 argument word
+
+ r4-r8 S register variable
+ r9 S (rfp) register variable (real frame pointer)
+
+ r10 F S (sl) stack limit (used by -mapcs-stack-check)
+ r11 F S (fp) argument pointer
+ r12 (ip) temp workspace
+ r13 F S (sp) lower end of current stack frame
+ r14 (lr) link address/workspace
+ r15 F (pc) program counter
+
+ f0 floating point result
+ f1-f3 floating point scratch
+
+ f4-f7 S floating point variable
+
+ cc This is NOT a real register, but is used internally
+ to represent things that use or set the condition
+ codes.
+ sfp This isn't either. It is used during rtl generation
+ since the offset between the frame pointer and the
+ auto's isn't known until after register allocation.
+ afp Nor this, we only need this because of non-local
+ goto. Without it fp appears to be used and the
+ elimination code won't get rid of sfp. It tracks
+ fp exactly at all times.
+
+ *: See CONDITIONAL_REGISTER_USAGE */
+
+ /* The stack backtrace structure is as follows:
+ fp points to here: | save code pointer | [fp]
+ | return link value | [fp, #-4]
+ | return sp value | [fp, #-8]
+ | return fp value | [fp, #-12]
+ [| saved r10 value |]
+ [| saved r9 value |]
+ [| saved r8 value |]
+ [| saved r7 value |]
+ [| saved r6 value |]
+ [| saved r5 value |]
+ [| saved r4 value |]
+ [| saved r3 value |]
+ [| saved r2 value |]
+ [| saved r1 value |]
+ [| saved r0 value |]
+ [| saved f7 value |] three words
+ [| saved f6 value |] three words
+ [| saved f5 value |] three words
+ [| saved f4 value |] three words
+ r0-r3 are not normally saved in a C function. */
+
+ /* 1 for registers that have pervasive standard uses
+ and are not available for the register allocator. */
+ #define FIXED_REGISTERS \
+ { \
+ 0,0,0,0,0,0,0,0, \
+ 0,0,0,0,0,1,0,1, \
+ 0,0,0,0,0,0,0,0, \
+ 1,1,1 \
+ }
+
+ /* 1 for registers not available across function calls.
+ These must include the FIXED_REGISTERS and also any
+ registers that can be used without being saved.
+ The latter must include the registers where values are returned
+ and the register where structure-value addresses are passed.
+ Aside from that, you can include as many other registers as you like.
+ The CC is not preserved over function calls on the ARM 6, so it is
+ easier to assume this for all. SFP is preserved, since FP is. */
+ #define CALL_USED_REGISTERS \
+ { \
+ 1,1,1,1,0,0,0,0, \
+ 0,0,0,0,1,1,1,1, \
+ 1,1,1,1,0,0,0,0, \
+ 1,1,1 \
+ }
+
+ #ifndef SUBTARGET_CONDITIONAL_REGISTER_USAGE
+ #define SUBTARGET_CONDITIONAL_REGISTER_USAGE
+ #endif
+
+ #define CONDITIONAL_REGISTER_USAGE \
+ { \
+ int regno; \
+ \
+ if (TARGET_SOFT_FLOAT || TARGET_THUMB) \
+ { \
+ for (regno = FIRST_ARM_FP_REGNUM; \
+ regno <= LAST_ARM_FP_REGNUM; ++regno) \
+ fixed_regs[regno] = call_used_regs[regno] = 1; \
+ } \
+ if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \
+ { \
+ fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
+ call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
+ } \
+ else if (TARGET_APCS_STACK) \
+ { \
+ fixed_regs[10] = 1; \
+ call_used_regs[10] = 1; \
+ } \
+ if (TARGET_APCS_FRAME) \
+ { \
+ fixed_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \
+ call_used_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \
+ } \
+ SUBTARGET_CONDITIONAL_REGISTER_USAGE \
+ }
Index: runtime/machdeps/arm_regs.h
===================================================================
RCS file: runtime/machdeps/arm_regs.h
diff -N runtime/machdeps/arm_regs.h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ runtime/machdeps/arm_regs.h 1 Dec 2005 07:23:16 -0000
@@ -0,0 +1,71 @@
+#ifndef MR_MACHDEPS_ARM_REGS_H
+#define MR_MACHDEPS_ARM_REGS_H
+
+#define MR_NUM_REAL_REGS 4
+
+/*
+** Machine registers MR_mr0 - MR_mr36 for the ARM architecture.
+*/
+
+register MR_Word MR_mr0 __asm__("r4"); /* sp */
+register MR_Word MR_mr1 __asm__("r5"); /* succip */
+register MR_Word MR_mr2 __asm__("r6"); /* r1 */
+register MR_Word MR_mr3 __asm__("r7"); /* r2 */
+
+/* leave r8, r9, r10 (sometimes), r11 for gcc */
+
+#define MR_save_regs_to_mem(save_area) ( \
+ save_area[0] = MR_mr0, \
+ save_area[1] = MR_mr1, \
+ save_area[2] = MR_mr2, \
+ save_area[3] = MR_mr3, \
+ (void)0 \
+ )
+
+#define MR_restore_regs_from_mem(save_area) ( \
+ MR_mr0 = save_area[0], \
+ MR_mr1 = save_area[1], \
+ MR_mr2 = save_area[2], \
+ MR_mr3 = save_area[3], \
+ (void)0 \
+)
+
+#define MR_save_transient_regs_to_mem(save_area) ((void)0)
+#define MR_restore_transient_regs_from_mem(save_area) ((void)0)
+
+#define MR_mr4 MR_fake_reg[4]
+#define MR_mr5 MR_fake_reg[5]
+#define MR_mr6 MR_fake_reg[6]
+#define MR_mr7 MR_fake_reg[7]
+#define MR_mr8 MR_fake_reg[8]
+#define MR_mr9 MR_fake_reg[9]
+#define MR_mr10 MR_fake_reg[10]
+#define MR_mr11 MR_fake_reg[11]
+#define MR_mr12 MR_fake_reg[12]
+#define MR_mr13 MR_fake_reg[13]
+#define MR_mr14 MR_fake_reg[14]
+#define MR_mr15 MR_fake_reg[15]
+#define MR_mr16 MR_fake_reg[16]
+#define MR_mr17 MR_fake_reg[17]
+#define MR_mr18 MR_fake_reg[18]
+#define MR_mr19 MR_fake_reg[19]
+#define MR_mr20 MR_fake_reg[20]
+#define MR_mr21 MR_fake_reg[21]
+#define MR_mr22 MR_fake_reg[22]
+#define MR_mr23 MR_fake_reg[23]
+#define MR_mr24 MR_fake_reg[24]
+#define MR_mr25 MR_fake_reg[25]
+#define MR_mr26 MR_fake_reg[26]
+#define MR_mr27 MR_fake_reg[27]
+#define MR_mr28 MR_fake_reg[28]
+#define MR_mr29 MR_fake_reg[29]
+#define MR_mr30 MR_fake_reg[30]
+#define MR_mr31 MR_fake_reg[31]
+#define MR_mr32 MR_fake_reg[32]
+#define MR_mr33 MR_fake_reg[33]
+#define MR_mr34 MR_fake_reg[34]
+#define MR_mr35 MR_fake_reg[35]
+#define MR_mr36 MR_fake_reg[36]
+#define MR_mr37 MR_fake_reg[37]
+
+#endif /* not MR_MACHDEPS_ARM_REGS_H */
Index: runtime/machdeps/arm_regtest
===================================================================
RCS file: runtime/machdeps/arm_regtest
diff -N runtime/machdeps/arm_regtest
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ runtime/machdeps/arm_regtest 2 Dec 2005 05:37:10 -0000
@@ -0,0 +1,7 @@
+#!/bin/sh
+
+for regname in \
+ r4 r5 r6 r7 r8 r9 r10 r11
+do
+ ./doregtest "$regname"
+done
--------------------------------------------------------------------------
mercury-reviews mailing list
post: mercury-reviews at cs.mu.oz.au
administrative address: owner-mercury-reviews at cs.mu.oz.au
unsubscribe: Address: mercury-reviews-request at cs.mu.oz.au Message: unsubscribe
subscribe: Address: mercury-reviews-request at cs.mu.oz.au Message: subscribe
--------------------------------------------------------------------------
More information about the reviews
mailing list